Operation of low voltage crystal oscillator circuits coupled with general-purpose input-output (GPIO) nodes, e.g., connection pads of an integrated circuit (IC) is a desired feature in today's integrated circuit offerings. However, low-voltage operation of a N-channel metal oxide semiconductor (NMOS) Gm-driver based crystal oscillator circuit is limited by the minimum Vdd (supply voltage) required to turn ON series isolation switches between the crystal oscillator circuits and the GPIO pads (see FIG. 1). The voltage required at a minimum is: 1-NMOS diode+the threshold voltage (Vt) of the NMOS switch. Normally these isolation switches are implemented as 3.3V capable standard Vt NMOS switches to guarantee lowest leakage current when disabled, thereby decoupling the crystal oscillator Gm-driver circuit from the GPIO pads of the IC. This insures meeting the CMOS IIH specification when using the GPIO pads in other configurations besides as connections for an external frequency determining crystal and associated components thereto.
But to guarantee crystal oscillator functioning at around 2V operating voltage, use of 3.3V capable native NMOS (low-Vt) transistors are required instead of standard VT NMOS transistor switches. However, using a native NMOS transistor switch will not isolate the oscillator Gm-driver transistor sufficiently to prevent excessive current leakage paths when the GPIO pads associated with the crystal oscillator circuit are driven by CMOS logic when in an “external clock” mode, or other uses of these GPIO pads. Therefore, the CMOS IIH leakage current specification cannot be met.